Beijing Institute of Open Source Chip

Release Date：2024-11-12 Info. Source：Beijing Overseas Talents Center

Beijing Institute of Open Source Chip (BOSC) was founded in December 2021. BOSC is a non-profit organization (NPO) dedicated to developing cutting-edge and fundamental technologies in the RISC-V field. BOSC is committed to driving innovation, fostering global collaboration, and contributing to the advancement and prosperity of the RISC-V ecosystem.

No.	Specialization	Job Title	Number	Valid Through	Expected Starting Date	Job Description	Age	Education	Qualifications	Supportting Policy and Benefits	Target Country/Region or Organization for the Candidate
1	Integrated Circuit	CPU Security Engineer	Four	2025/12/31		1.Participate in developing microarchitecture defense mechanisms against microarchitectural attacks in XiangShan processors.2.Involved in implementing and verifying security features such as confidential computing, virtualization security, runtime integrity protection, and advanced cryptographic algorithms for Xiangshan processors.3.Set up a fuzzing platform for processor security vulnerabilities.4.Conduct microarchitectural attacks on Xiangshan processors.5.Reproduce attack scenarios and identify root causes.	No Requirement	Master	1.Have a solid understanding of fundamental computer architecture knowledge.2.Proficient in modern superscalar processor microarchitecture design; experience in designing CPU internal MMUs and predictors is preferred.3.Familiar with the RISC-V instruction set and related toolchains.4.Proficient in hardware programming languages and EDA tools.5.Familiar with the use of scripting tools like Makefile and Shell.6.Background in processor chip security research or security vulnerability discovery is preferred.	Basic Benefits:Seven types of insurance and housing fundPaid annual leavePaid sick leaveRegular health check-upsSkill Enhancement:On-the-job trainingExpert lecturesTechnical DiscussionsEmployee Benefits:Overtime allowanceHoliday giftsBirthday perksTeam-building activitiesMeal Provisions:Lunch at workBreakfast with discountSnacks, cold drinks, and afternoon teaSustainable Development:Work and residence permitGovernment-subsidized rental housingBeijing household registrationTalent programs ApplicationHumanistic Care:Free work attireTeam merchandise	No restrictions	Send
2	Integrated Circuit	CPU Design Engineer	Five	2025/12/31		1.Responsible for module design and coding of the RISC-V processor microarchitecture.2.Assist in module-level functional verification and performance analysis.3.Assist verification engineers in system-level simulation verification, coverage analysis, FPGA verification, and chip debugging.4.Participate in chip architecture design and specification definition.5.Responsible for writing design documentation.	No Requirement	Master	1.Master's degree or higher in Computer Science and Technology or related fields.2.Experience in at least one of the following: computer architecture knowledge, CPU microarchitecture knowledge, CPU performance simulators, cache coherence, power management, security, and related fields.3.Familiar with hardware design languages such as Chisel or Verilog.4.Preference for candidates with experience in high-performance CPU processor development in the industry.5.Excellent learning ability, communication skills, and teamwork spirit; diligent and responsible work attitude.	Basic Benefits:Seven types of insurance and housing fundPaid annual leavePaid sick leaveRegular health check-upsSkill Enhancement:On-the-job trainingExpert lecturesTechnical DiscussionsEmployee Benefits:Overtime allowanceHoliday giftsBirthday perksTeam-building activitiesMeal Provisions:Lunch at workBreakfast with discountSnacks, cold drinks, and afternoon teaSustainable Development:Work and residence permitGovernment-subsidized rental housingBeijing household registrationTalent programs ApplicationHumanistic Care:Free work attireTeam merchandise	No restrictions	Send
3	Integrated Circuit	CPU Architecture Design Engineer	Two	2025/12/31		1.Design high-performance general-purpose RISC-V processors.2.Responsible for the architectural design and performance modeling of high-performance processors, optimizing components such as cache prefetching, branch prediction, instruction fetch, and memory access.3.Communicate with the RTL team of high-performance processors to implement features and align performance gaps.4.Responsible for performance analysis and optimization of high-performance processors for specific applications.	No Requirement	Master	1.Have studied advanced computer architecture courses in-depth and engaged in related project design. In terms of theory, need to understand branch prediction, out-of-order execution, and caches. In practice, required to reproduce microarchitecture papers based on simulators like GEM5, QEMU, and Champsim.2.Proficient in C++ with strong debugging skills.3.Knowledgeable in scripting languages such as Python and Bash.	Basic Benefits:Seven types of insurance and housing fundPaid annual leavePaid sick leaveRegular health check-upsSkill Enhancement:On-the-job trainingExpert lecturesTechnical DiscussionsEmployee Benefits:Overtime allowanceHoliday giftsBirthday perksTeam-building activitiesMeal Provisions:Lunch at workBreakfast with discountSnacks, cold drinks, and afternoon teaSustainable Development:Work and residence permitGovernment-subsidized rental housingBeijing household registrationTalent programs ApplicationHumanistic Care:Free work attireTeam merchandise	No restrictions	Send
4	Integrated Circuit	CPU Verification Engineer	Five	2025/12/31		1.Responsible for building UVM-based verification environments, formulating verification strategies, decomposing test points, developing test cases and environment components, running simulations and regressions, and identifying issues.2.Responsible for UT, IT, and ST verification quality activities, ensuring high-quality review of all verification elements and execution of established quality actions.3.Coordinate between design and verification teams as well as upstream and downstream processes, identifying and addressing gaps to enhance verification completeness and ensure high-quality verification delivery.4.Responsible for exploring new verification methods and techniques, continuously optimizing scripts and tools to improve verification efficiency.	No Requirement	Master	1.Master's degree or higher, with an interest in computer instruction set architecture and microarchitecture.2.Familiar with the UVM framework and capable of independently setting up environments and developing scripts.3.Familiar with large-scale IC verification processes; successful tape-out project experience is a plus.4.Proficient in at least one mainstream IC verification design language; familiarity with Chisel is a plus.5.Experience in complete verification delivery, with involvement in core, SoC, bus, cache, etc., being a plus.	Basic Benefits:Seven types of insurance and housing fundPaid annual leavePaid sick leaveRegular health check-upsSkill Enhancement:On-the-job trainingExpert lecturesTechnical DiscussionsEmployee Benefits:Overtime allowanceHoliday giftsBirthday perksTeam-building activitiesMeal Provisions:Lunch at workBreakfast with discountSnacks, cold drinks, and afternoon teaSustainable Development:Work and residence permitGovernment-subsidized rental housingBeijing household registrationTalent programs ApplicationHumanistic Care:Free work attireTeam merchandise	No restrictions	Send
5	Integrated Circuit	Processor Security Engineer	One to Three	2025/12/31		1.Participate in developing microarchitecture defense mechanisms against microarchitectural attacks on Xiangshan processors.2.Contribute to the implementation and verification of security features for Xiangshan processors, including confidential computing, virtualization security, runtime integrity protection, and advanced cryptographic algorithms.	No Requirement	Master	1.Solid foundational knowledge of computer architecture.2.Proficiency in modern superscalar processor microarchitecture design; experience with CPU internal MMU and predictors is preferred.3.Familiarity with the RISC-V instruction set and related toolchains.4.Proficient in hardware programming languages and EDA tools.5.Knowledgeable in using scripting tools such as Makefile and Shell.6.Background in processor chip security research or security vulnerability discovery is preferred.	Basic Benefits:Seven types of insurance and housing fundPaid annual leavePaid sick leaveRegular health check-upsSkill Enhancement:On-the-job trainingExpert lecturesTechnical DiscussionsEmployee Benefits:Overtime allowanceHoliday giftsBirthday perksTeam-building activitiesMeal Provisions:Lunch at workBreakfast with discountSnacks, cold drinks, and afternoon teaSustainable Development:Work and residence permitGovernment-subsidized rental housingBeijing household registrationTalent programs ApplicationHumanistic Care:Free work attireTeam merchandise	No restrictions	Send
6	Integrated Circuit	XiangShan Processor Security Vulnerability Analyst	One	2025/12/31		1.Build a fuzzing platform for processor security vulnerabilities.2.Conduct microarchitectural attack analysis on Xiangshan processors.3.Reproduce attack programs and identify the causes.	No Requirement	Master	1.Solid foundational knowledge of computer architecture.2.Proficiency in the basics of modern superscalar processor microarchitecture.3.Proficient in the RISC-V instruction set and related toolchains.4.Familiar with hardware programming languages and EDA tools.5.Experienced in using scripting tools such as 6.Makefile and Shell.Experience in discovering processor security vulnerabilities is preferred.	Basic Benefits:Seven types of insurance and housing fundPaid annual leavePaid sick leaveRegular health check-upsSkill Enhancement:On-the-job trainingExpert lecturesTechnical DiscussionsEmployee Benefits:Overtime allowanceHoliday giftsBirthday perksTeam-building activitiesMeal Provisions:Lunch at workBreakfast with discountSnacks, cold drinks, and afternoon teaSustainable Development:Work and residence permitGovernment-subsidized rental housingBeijing household registrationTalent programs ApplicationHumanistic Care:Free work attireTeam merchandise	No restrictions	Send
7	Integrated Circuit	AI Chip Simulator Engineer (Performance Modeling)	Three	2025/12/31		1.Responsible for the architectural design and performance modeling of RISC-V AI processors, focusing on modeling and optimizing components such as matrix computation units, memory access data paths, and on-chip interconnect networks.2.Communicate with the RTL team for AI processors to define specifications, implement design features, and align performance differences.3.Responsible for performance analysis and optimization of AI kernels.	No Requirement	Master	Basic Requirements:1.Have thoroughly studied courses such as Operating Systems and Computer Architecture, with experience in related project design.2.Proficient in C/C++ with strong debugging skills.3.Knowledgeable in scripting languages like Python and Bash.4.Skilled in using tools like SSH and Git in a Linux environment.5.Able to effectively use search engines and technical documentation to find solutions on platforms like Stack Overflow, mailing lists, community issues, and chatbots.Preferred Experience:1.Experience with simulators like QEMU, NEMU, or GEM5 for instruction implementation, architectural exploration, and performance analysis.2.Experience writing deep learning operators using frameworks like CUDA or Triton.3.Involvement in research related to CPU, GPGPU, or AI accelerators.4.Experience in inference acceleration using methods such as Prefill/Decoding separation, Prefix Cache, or speculative inference.5.Participation in open-source projects at the PLCT lab of the Institute of Software, Chinese Academy of Sciences.6.Completion of Phase B or higher of the "One Student One Chip" program.7.Award-winning experience in the "Loongson Cup"(NSCSCC) CPU design competition.8.Familiarity with bus protocols such as AMBA or TileLink.	Basic Benefits:Seven types of insurance and housing fundPaid annual leavePaid sick leaveRegular health check-upsSkill Enhancement:On-the-job trainingExpert lecturesTechnical DiscussionsEmployee Benefits:Overtime allowanceHoliday giftsBirthday perksTeam-building activitiesMeal Provisions:Lunch at workBreakfast with discountSnacks, cold drinks, and afternoon teaSustainable Development:Work and residence permitGovernment-subsidized rental housingBeijing household registrationTalent programs ApplicationHumanistic Care:Free work attireTeam merchandise	No restrictions	Send
8	Integrated Circuit	AI Chip RTL Design Engineer	Thirty	2025/12/31		1.Responsible for the architectural design and implementation of RISC-V AI processors, focusing on the implementation and optimization of components such as matrix computation units, memory access data paths, and on-chip interconnect networks.2.Communicate with the backend and verification teams to fix functional issues and perform PPA (Power, Performance, and Area) optimization.	No Requirement	Master	Basic Requirements:1.Have thoroughly studied courses such as Digital Circuits and Computer Architecture, and have experience in related project design.2.Proficient in C/C++ with strong debugging skills.3.Knowledgeable in scripting languages like Python and Bash.4.Skilled in using tools like SSH and Git in a Linux environment.5.Able to effectively use search engines and technical documentation to find solutions on platforms like Stack Overflow, mailing lists, community issues, and chatbots.Preferred Experience:1.Experience with simulators like QEMU, NEMU, or GEM5 for instruction implementation, architectural exploration, and performance analysis.2.Experience writing deep learning operators using frameworks like CUDA or Triton.3.Involvement in research related to CPU, GPGPU, or AI accelerators.4.Experience in inference acceleration using methods such as Prefill/Decoding separation, Prefix Cache, or speculative inference.5.Participation in open-source projects at the PLCT lab of the Institute of Software, Chinese Academy of Sciences.6.Completion of Phase B or higher of the "One Student One Chip" program.7.Award-winning experience in the "Loongson Cup"(NSCSCC) CPU design competition.8.Familiarity with bus protocols such as AMBA or TileLink.	Basic Benefits:Seven types of insurance and housing fundPaid annual leavePaid sick leaveRegular health check-upsSkill Enhancement:On-the-job trainingExpert lecturesTechnical DiscussionsEmployee Benefits:Overtime allowanceHoliday giftsBirthday perksTeam-building activitiesMeal Provisions:Lunch at workBreakfast with discountSnacks, cold drinks, and afternoon teaSustainable Development:Work and residence permitGovernment-subsidized rental housingBeijing household registrationTalent programs ApplicationHumanistic Care:Free work attireTeam merchandise	No restrictions	Send
9	Integrated Circuit	Design Engineer on Network-On-Chip	Six	2025/12/31		1.Participate in the front-end design of RISC-V multi-core processor systems, including architectural analysis, logic design, and functional verification.2.Write module microarchitecture documentation based on specifications and requirements, and design and implement specific functional modules of the processor core, such as routing, coherence (shared cache and snoop filter), I/O interface bridges, memory interface bridges, and chiplets.3.Write and maintain related Chisel/Verilog/VHDL code according to front-end development milestones, perform logic simulation and verification to ensure design correctness and performance.4.Collaborate in formulating functional verification and verification plans, design and execute corresponding verification test cases.5.Work closely with team members to resolve issues encountered in the design process and ensure project progress and delivery.6.Participate in writing design documents and attending design review meetings, document design plans and work progress, and propose improvement suggestions and optimization solutions.	No Requirement	Master	1.Bachelor's degree or higher in Electronic Engineering, Computer Engineering, or a related field; Master's or Ph.D. preferred.2.Familiar with digital chip front-end design (Chisel, Verilog, VHDL, etc.) and simulation tools, with strong coding and logical thinking skills.3.Passion for continuous learning and exploration of new technologies, with good teamwork spirit, communication skills, and problem-solving abilities.4.Preference for candidates with experience in NoC design, modeling, shared cache and snoop filter design, network protocols (AXI-ACE-CHI), I/O interface bridges, and chiplet design.	Basic Benefits:Seven types of insurance and housing fundPaid annual leavePaid sick leaveRegular health check-upsSkill Enhancement:On-the-job trainingExpert lecturesTechnical DiscussionsEmployee Benefits:Overtime allowanceHoliday giftsBirthday perksTeam-building activitiesMeal Provisions:Lunch at workBreakfast with discountSnacks, cold drinks, and afternoon teaSustainable Development:Work and residence permitGovernment-subsidized rental housingBeijing household registrationTalent programs ApplicationHumanistic Care:Free work attireTeam merchandise	No restrictions	Send
10	Integrated Circuit	Verification Engineer on Network-On-Chip	Twelve	2025/12/31		1.Participate in formulating verification plans for multi-core processor systems; design and implement corresponding verification test cases based on specifications and requirements.2.Engage in functional simulation and verification of related Chisel/Verilog/VHDL code to ensure that the design meets specification requirements.3.Design and implement verification environments and test platforms, including configuring and using simulators and emulators.4.Perform functional verification, timing verification, and performance validation; analyze and resolve design issues, and propose improvement suggestions and optimization solutions.5.Participate in the daily work of the verification team, including writing verification documents and attending design review meetings, documenting design plans and work progress.6.Collaborate closely with team members and other related teams to ensure project progress and delivery.	No Requirement	Master	2.Bachelor's degree or higher in Electronic Engineering, Computer Engineering, or a related field; Master's or Ph.D. preferred.2.Familiar with digital chip front-end design (Chisel, Verilog, VHDL, etc.) and simulation tools, with strong coding and logical thinking skills.3.Passion for continuous learning and exploration of new technologies, with good teamwork spirit, communication skills, and problem-solving abilities.4.Preference for candidates with experience in NoC design, modeling, shared cache and snoop filter design, network protocols (AXI-ACE-CHI), I/O interface bridges, and chiplet design.	Basic Benefits:Seven types of insurance and housing fundPaid annual leavePaid sick leaveRegular health check-upsSkill Enhancement:On-the-job trainingExpert lecturesTechnical DiscussionsEmployee Benefits:Overtime allowanceHoliday giftsBirthday perksTeam-building activitiesMeal Provisions:Lunch at workBreakfast with discountSnacks, cold drinks, and afternoon teaSustainable Development:Work and residence permitGovernment-subsidized rental housingBeijing household registrationTalent programs ApplicationHumanistic Care:Free work attireTeam merchandise	No restrictions	Send
11	Integrated Circuit	Digital Design Engineer	Three to Five	2025/12/31		1.Responsible for module design and code writing for RISC-V processor microarchitecture.2.Perform module-level functional verification and performance analysis.3.Assist verification engineers with system-level simulation verification, coverage analysis, FPGA verification, and chip debugging.4.Participate in chip architecture design and specification definition.5.Write design documentation.	No Requirement	Master	1.Master's degree or higher in Computer Science and Technology or related fields.2.Experience in at least one of the following areas: computer architecture knowledge, CPU microarchitecture knowledge, CPU performance simulators, cache coherence, power management, or security.3.Familiar with hardware design languages such as Chisel or Verilog.4.Preference for candidates with experience in high-performance CPU processor development in the industry.5.Excellent learning ability, communication skills, teamwork spirit, and a responsible work attitude.	Basic Benefits:Seven types of insurance and housing fundPaid annual leavePaid sick leaveRegular health check-upsSkill Enhancement:On-the-job trainingExpert lecturesTechnical DiscussionsEmployee Benefits:Overtime allowanceHoliday giftsBirthday perksTeam-building activitiesMeal Provisions:Lunch at workBreakfast with discountSnacks, cold drinks, and afternoon teaSustainable Development:Work and residence permitGovernment-subsidized rental housingBeijing household registrationTalent programs ApplicationHumanistic Care:Free work attireTeam merchandise	No restrictions	Send
12	Integrated Circuit	SoC Engineer	One to Three	2025/12/31		1.Participate in defining SoC chip specifications and perform detailed module design according to overall design requirements.2.Based on module specifications, collaborate with software teams to determine hardware-software partitioning and complete detailed design of digital circuit modules; responsible for verifying the basic functionality of the designed modules.3.Engage in the development of key IP cores, such as high-performance RISC-V processor cores, DDR, PCIe, GPU, media codecs, GMAC, etc.4.Responsible for front-end design tasks, including circuit synthesis, timing analysis, and formal verification.5.Oversee the integration, verification, testing, and debugging of modules.6.Contribute to the development of process standards for the tasks undertaken.	No Requirement	Master	1.Master's degree or higher.2.Solid knowledge base in computer architecture and familiarity with processor architecture.3.Proficient in Verilog, with the ability to write testbenches for module and system-level verification.4.Familiarity with Chisel or experience in Chisel development is a plus.5.Proficient in UNIX and LINUX operating systems, and familiar with programming languages such as shell, Tcl, and Perl.6.Strong communication and learning skills, with a good team spirit.	Basic Benefits:Seven types of insurance and housing fundPaid annual leavePaid sick leaveRegular health check-upsSkill Enhancement:On-the-job trainingExpert lecturesTechnical DiscussionsEmployee Benefits:Overtime allowanceHoliday giftsBirthday perksTeam-building activitiesMeal Provisions:Lunch at workBreakfast with discountSnacks, cold drinks, and afternoon teaSustainable Development:Work and residence permitGovernment-subsidized rental housingBeijing household registrationTalent programs ApplicationHumanistic Care:Free work attireTeam merchandise	No restrictions	Send
13	Integrated Circuit	XiangShan Processor Security Vulnerability Analyst	Three to Five	2024/12/31	2024/12/31	1.Build a fuzzing platform for processor security vulnerabilities.2.Conduct microarchitectural attack analysis on Xiangshan processors.3.Reproduce attack programs and identify the causes.	No Requirement	Master	1.Solid foundational knowledge of computer architecture.2.Proficiency in the basics of modern superscalar processor microarchitecture.3.Proficient in the RISC-V instruction set and related toolchains.4.Familiar with hardware programming languages and EDA tools.5.Experienced in using scripting tools such as 6.Makefile and Shell.Experience in discovering processor security vulnerabilities is preferred.	Basic Coverage:Commercial insuranceSkill Enhancement:On-the-job trainingExpert lecturesTechnical DiscussionsBenefits:Holiday benefitsBirthday benefitsTeam-building activitiesMeal Provisions:Lunch at workBreakfast with discountSnacks, cold drinks, and afternoon teaSupportive Work Environment:Free workwearTeam surroundings	No restrictions	Send
14	Integrated Circuit	Trusted Execution Environment Hardware Architecture Verification	Two	2024/12/31	2024/12/31	1.Maintain the processor integration verification environment.2.Organize and write relevant functional coverage points.3.Develop verification cases, collect coverage metrics, and prepare verification reports.	No Requirement	Master	1.Solid foundational knowledge of computer architecture.2.Proficient in the RISC-V instruction set and related toolchains.3.Familiar with hardware programming languages and EDA tools.4.Verification experience or familiarity with address space virtualization is preferred.	Basic Coverage:Commercial insuranceSkill Enhancement:On-the-job trainingExpert lecturesTechnical DiscussionsBenefits:Holiday benefitsBirthday benefitsTeam-building activitiesMeal Provisions:Lunch at workBreakfast with discountSnacks, cold drinks, and afternoon teaSupportive Work Environment:Free workwearTeam surroundings	No restrictions	Send

Please click download for job details: View available positions.xls

Beijing Overseas Talents Center